Instruction set architecture support in portable operating systems.
Updated February 2014.

    Server/Workstation     Embedded    
Linux NetBSD OpenBSD FreeBSD eCos Windows CE uClinux
AIS1 0
Alpha yes yes yes yes 4
AMD64 yes yes yes yes 4
ARM yes yes yes soon yes yes yes 6+
AVR32 yes 1+
ColdFire yes yes? yes 2
CRIS yes yes 2
FR 0
i960 no yes? 0
H8 yes yes yes 3
IMPI2 no no 0
IPF3 yes yes 2
M32R yes4 1
M68000 yes yes yes yes yes 4
M88000 no yes 1
MicroBlaze yes 1
MIPS yes* yes yes soon yes yes 5
MIPS16 0
MN10300 yes? yes yes 2
NS32000 yes 1
Nios yes 1
PA-RISC yes* yes yes 3
OpenRISC yes 1
PDP-10 no soon 0+
PowerPC yes* yes yes yes yes yes 6     Motorola PowerPC, IBM PowerPC
ROMP no no 0
S/390 yes* no yes 2
SHcompact5 yes yes yes yes 4
SHmedia6 yes*4 yes* 2
SPARC yes* yes* yes* yes yes yes 6
V800 yes no yes yes 3
VAX yes4 yes yes 3
x86 yes yes yes yes yes yes 6
20 13+ 10 7+ 10 6 10

Notes:
+ Soon to be increased.
? Unconfirmed, not included in the total count.
* Both 32-bit and 64-bit support.
1 The Alternative Instruction Set in VIA's new C3 processor.
2 The CISC layer in old AS/400 machines.
3 Itanium Processor Family, formerly IA-64.
4 Not yet merged into Linus' tree.
5 Old 16-bit SuperH instruction set.
6 New 32-bit SuperH instruction set, introduced in SH5.

Introduction of 64-bit architectures:

p
Architecture Processor Introduction
MIPS R4000 1991?
Alpha 21064 1992
SPARC UltraSPARC November 1995
PA-RISC PA-8000 June 1996
PowerPC RS64 September 1997
z/Architecture z900 December 2000
IPF Itanium June 2001?
SuperH SH5-100 February 2002
AMD64 Opteron 24x April 2003